Indexed zeropage addressing

Indexed zeropage addressing is similar to Indexed absolute addressing, except that the base address given is in zero-page.

Details

In Indexed zero page addressing the contents of either the X or Y index register are added to a given, zero-page base address, to obtain the "target" address. This is useful in loops in which a number (256 or less) of bytes in memory is to be given similar "treatment". Here is an example in assembler, which uses a loop with the X index register to copy 50 bytes starting at $A0 in zero-page into 50 bytes beginning at label Target:

       LDX #49       ;Use X index register as "counter"
Loop:  LDA $A0,X     ;Get a byte from Source + X
       STA Target,X  ;Store it at Target + X
       DEX           ;Count down one byte
       BPL Loop      ;If not negative (-1, FFh), we're not done, repeat from label Loop

In this example, the LDA instruction is using Indexed zeropage addressing mode: The LDA fetches a byte from an address that is calculated as the address of $A0 plus the contents of the X index register. The STA instruction is using the Indexed absolute addressing mode, storing the value in the Acculumator at the address of label Target plus the contents of the X index register. Since the X register acts as a counter in the loop, counting up from 49 thru 0, this reading and writing of bytes takes place on 50 consecutive bytes in memory. When X reaches -1 the BPL at the end no longer takes the branch back to label Loop, and the system "escapes" the loop.

Since an index register can only hold single-byte, unsigned integers in the range from 0 thru 255, the above routine can handle no more than 256 bytes. To process more bytes in a loop structure like this requires the use of indirect-indexed addressing.

The following 18 machine language instructions support indexed absolute addressing: ADC, AND, ASL, CMP, DEC, EOR, INC, LDA, LDX, LDY, LSR, ORA, ROL, ROR, SBC, STA, STX, STY.